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RTC driver

(์—ฐ์Šต๋ฌธ์ œ๋กœ ๋Œ์•„๊ฐ€๊ธฐ)

main.rs:

#![no_main]
#![no_std]

mod exceptions;
mod logger;
mod pl011;
mod pl031;

use crate::pl031::Rtc;
use arm_gic::gicv3::{IntId, Trigger};
use arm_gic::{irq_enable, wfi};
use chrono::{TimeZone, Utc};
use core::hint::spin_loop;
use crate::pl011::Uart;
use arm_gic::gicv3::GicV3;
use core::panic::PanicInfo;
use log::{error, info, trace, LevelFilter};
use smccc::psci::system_off;
use smccc::Hvc;

/// GICv3์˜ ๊ธฐ๋ณธ ์ฃผ์†Œ์ž…๋‹ˆ๋‹ค.
const GICD_BASE_ADDRESS: *mut u64 = 0x800_0000 as _;
const GICR_BASE_ADDRESS: *mut u64 = 0x80A_0000 as _;

/// ๊ธฐ๋ณธ PL011 UART์˜ ๊ธฐ๋ณธ ์ฃผ์†Œ์ž…๋‹ˆ๋‹ค.
const PL011_BASE_ADDRESS: *mut u32 = 0x900_0000 as _;

/// PL031 RTC์˜ ๊ธฐ๋ณธ ์ฃผ์†Œ์ž…๋‹ˆ๋‹ค.
const PL031_BASE_ADDRESS: *mut u32 = 0x901_0000 as _;
/// PL031 RTC์—์„œ ์‚ฌ์šฉํ•˜๋Š” IRQ์ž…๋‹ˆ๋‹ค.
const PL031_IRQ: IntId = IntId::spi(2);

#[no_mangle]
extern "C" fn main(x0: u64, x1: u64, x2: u64, x3: u64) {
    // `PL011_BASE_ADDRESS`๊ฐ€ PL011 ๊ธฐ๊ธฐ์˜ ๊ธฐ๋ณธ ์ฃผ์†Œ์ด๊ณ 
    // ์ด ์ฃผ์†Œ ๋ฒ”์œ„์— ์•ก์„ธ์Šคํ•˜๋Š” ๋‹ค๋ฅธ ํ•ญ๋ชฉ์ด ์—†์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
    let uart = unsafe { Uart::new(PL011_BASE_ADDRESS) };
    logger::init(uart, LevelFilter::Trace).unwrap();

    info!("main({:#x}, {:#x}, {:#x}, {:#x})", x0, x1, x2, x3);

    // `GICD_BASE_ADDRESS` ๋ฐ `GICR_BASE_ADDRESS`๊ฐ€ ๊ฐ๊ฐ GICv3 ๋ฐฐํฌ์ž ๋ฐ ์žฌ๋ฐฐํฌ์ž์˜
 // ๊ธฐ๋ณธ ์ฃผ์†Œ์ด์ด๊ณ 
    // ์ด๋Ÿฌํ•œ ์ฃผ์†Œ ๋ฒ”์œ„์— ์•ก์„ธ์Šคํ•˜๋Š” ๋‹ค๋ฅธ ํ•ญ๋ชฉ์ด ์—†์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
    let mut gic = unsafe { GicV3::new(GICD_BASE_ADDRESS, GICR_BASE_ADDRESS) };
    gic.setup();

    // `PL031_BASE_ADDRESS`๊ฐ€ PL031 ๊ธฐ๊ธฐ์˜ ๊ธฐ๋ณธ ์ฃผ์†Œ์ด๊ณ 
    // ์ด ์ฃผ์†Œ ๋ฒ”์œ„์— ์•ก์„ธ์Šคํ•˜๋Š” ๋‹ค๋ฅธ ํ•ญ๋ชฉ์ด ์—†์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
    let mut rtc = unsafe { Rtc::new(PL031_BASE_ADDRESS) };
    let timestamp = rtc.read();
    let time = Utc.timestamp_opt(timestamp.into(), 0).unwrap();
    info!("RTC: {time}");

    GicV3::set_priority_mask(0xff);
    gic.set_interrupt_priority(PL031_IRQ, 0x80);
    gic.set_trigger(PL031_IRQ, Trigger::Level);
    irq_enable();
    gic.enable_interrupt(PL031_IRQ, true);

    // ์ธํ„ฐ๋ŸฝํŠธ ์—†์ด 3์ดˆ๊ฐ„ ๊ธฐ๋‹ค๋ฆฝ๋‹ˆ๋‹ค.
    let target = timestamp + 3;
    rtc.set_match(target);
    info!("{}์„(๋ฅผ) ๊ธฐ๋‹ค๋ฆฌ๋Š” ์ค‘", Utc.timestamp_opt(target.into(), 0).unwrap());
    trace!(
        "matched={}, interrupt_pending={}",
        rtc.matched(),
        rtc.interrupt_pending()
    );
    while !rtc.matched() {
        spin_loop();
    }
    trace!(
        "matched={}, interrupt_pending={}",
        rtc.matched(),
        rtc.interrupt_pending()
    );
    info!("๋Œ€๊ธฐ ์™„๋ฃŒ๋จ");

    // ์ธํ„ฐ๋ŸฝํŠธ๋ฅผ ์œ„ํ•ด 3์ดˆ ๋” ๊ธฐ๋‹ค๋ฆฝ๋‹ˆ๋‹ค.
    let target = timestamp + 6;
    info!("{}์„(๋ฅผ) ๊ธฐ๋‹ค๋ฆฌ๋Š” ์ค‘", Utc.timestamp_opt(target.into(), 0).unwrap());
    rtc.set_match(target);
    rtc.clear_interrupt();
    rtc.enable_interrupt(true);
    trace!(
        "matched={}, interrupt_pending={}",
        rtc.matched(),
        rtc.interrupt_pending()
    );
    while !rtc.interrupt_pending() {
        wfi();
    }
    trace!(
        "matched={}, interrupt_pending={}",
        rtc.matched(),
        rtc.interrupt_pending()
    );
    info!("๋Œ€๊ธฐ ์™„๋ฃŒ๋จ");

    system_off::<Hvc>().unwrap();
}

#[panic_handler]
fn panic(info: &PanicInfo) -> ! {
    error!("{info}");
    system_off::<Hvc>().unwrap();
    loop {}
}

pl031.rs:

#![allow(unused)]
fn main() {
use core::ptr::{addr_of, addr_of_mut};

#[repr(C, align(4))]
struct Registers {
    /// ๋ฐ์ดํ„ฐ ๋ ˆ์ง€์Šคํ„ฐ
    dr: u32,
    /// ์ผ์น˜ ๋ ˆ์ง€์Šคํ„ฐ
    mr: u32,
    /// ๋กœ๋“œ ๋ ˆ์ง€์Šคํ„ฐ
    lr: u32,
    /// ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ
    cr: u8,
    _reserved0: [u8; 3],
    /// ์ธํ„ฐ๋ŸฝํŠธ ๋งˆ์Šคํฌ ์„ธํŠธ ๋˜๋Š” ์ •๋ฆฌ ๋ ˆ์ง€์Šคํ„ฐ
    imsc: u8,
    _reserved1: [u8; 3],
    /// ์›์‹œ ์ธํ„ฐ๋ŸฝํŠธ ์ƒํƒœ
    ris: u8,
    _reserved2: [u8; 3],
    /// ๋งˆ์Šคํ‚น๋œ ์ธํ„ฐ๋ŸฝํŠธ ์ƒํƒœ
    mis: u8,
    _reserved3: [u8; 3],
    /// ์ธํ„ฐ๋ŸฝํŠธ ์ •๋ฆฌ ๋ ˆ์ง€์Šคํ„ฐ
    icr: u8,
    _reserved4: [u8; 3],
}

/// PL031 ์‹ค์‹œ๊ฐ„ ์‹œ๊ณ„์šฉ ๋“œ๋ผ์ด๋ฒ„
#[derive(Debug)]
pub struct Rtc {
    registers: *mut Registers,
}

impl Rtc {
    /// ์ง€์ •๋œ ๊ธฐ๋ณธ ์ฃผ์†Œ์— PL031 ๊ธฐ๊ธฐ์— ๋Œ€ํ•œ RTC ๋“œ๋ผ์ด๋ฒ„์˜ ์ƒˆ ์ธ์Šคํ„ด์Šค๋ฅผ
 /// ์ƒ์„ฑํ•ฉ๋‹ˆ๋‹ค.
 ///
 /// # ์•ˆ์ „
 ///
 /// ์ง€์ •๋œ ๊ธฐ๋ณธ ์ฃผ์†Œ๋Š” PL031 ๊ธฐ๊ธฐ์˜
 /// MMIO ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ ๊ฐ€๋ฆฌ์ผœ์•ผ ํ•˜๋ฉฐ,
 /// ์ด๋Š” ํ”„๋กœ์„ธ์Šค์˜ ์ฃผ์†Œ ๊ณต๊ฐ„์— ๊ธฐ๊ธฐ ๋ฉ”๋ชจ๋ฆฌ๋กœ
 /// ๋งคํ•‘๋˜์–ด์•ผ ํ•˜๋ฉฐ ๋‹ค๋ฅธ ๋ณ„์นญ์€ ์—†์–ด์•ผ ํ•ฉ๋‹ˆ๋‹ค.
    pub unsafe fn new(base_address: *mut u32) -> Self {
        Self { registers: base_address as *mut Registers }
    }

    /// ํ˜„์žฌ RTC ๊ฐ’์„ ์ฝ์Šต๋‹ˆ๋‹ค.
    pub fn read(&self) -> u32 {
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        unsafe { addr_of!((*self.registers).dr).read_volatile() }
    }

    /// ์ผ์น˜ ๊ฐ’์„ ์ž‘์„ฑํ•ฉ๋‹ˆ๋‹ค. RTC ๊ฐ’์ด ์ด ๊ฐ’๊ณผ ์ผ์น˜ํ•˜๋ฉด ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€
    /// ์ƒ์„ฑ๋ฉ๋‹ˆ๋‹ค(์‚ฌ์šฉ ์„ค์ •๋œ ๊ฒฝ์šฐ).
    pub fn set_match(&mut self, value: u32) {
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        unsafe { addr_of_mut!((*self.registers).mr).write_volatile(value) }
    }

    /// ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ํ™œ์„ฑํ™”๋˜์—ˆ๋Š”์ง€ ์—ฌ๋ถ€์™€ ๊ด€๊ณ„์—†์ด ์ผ์น˜ ๋ ˆ์ง€์Šคํ„ฐ๊ฐ€ RTC ๊ฐ’๊ณผ ์ผ์น˜ํ•˜๋Š”์ง€ ์—ฌ๋ถ€๋ฅผ
    /// ๋ฐ˜ํ™˜ํ•ฉ๋‹ˆ๋‹ค.
    pub fn matched(&self) -> bool {
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        let ris = unsafe { addr_of!((*self.registers).ris).read_volatile() };
        (ris & 0x01) != 0
    }

    /// ํ˜„์žฌ ๋Œ€๊ธฐ ์ค‘์ธ ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ์žˆ๋Š”์ง€ ์—ฌ๋ถ€๋ฅผ ๋ฐ˜ํ™˜ํ•ฉ๋‹ˆ๋‹ค.
    ///
    /// ์ด๋Š” 'matched'๊ฐ€ true๋ฅผ ๋ฐ˜ํ™˜ํ•˜๊ณ  ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ๋งˆ์Šคํ‚น๋œ ๊ฒฝ์šฐ์—๋งŒ
    /// true์—ฌ์•ผ ํ•ฉ๋‹ˆ๋‹ค.
    pub fn interrupt_pending(&self) -> bool {
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        let ris = unsafe { addr_of!((*self.registers).mis).read_volatile() };
        (ris & 0x01) != 0
    }

    /// ์ธํ„ฐ๋ŸฝํŠธ ๋งˆ์Šคํฌ๋ฅผ ์„ค์ •ํ•˜๊ฑฐ๋‚˜ ์ง€์›๋‹ˆ๋‹ค.
    ///
    /// ๋งˆ์Šคํฌ๊ฐ€ true์ธ ๊ฒฝ์šฐ ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ์‚ฌ์šฉ ์„ค์ •๋ฉ๋‹ˆ๋‹ค. false์ด๋ฉด
    /// ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ์‚ฌ์šฉ ์ค‘์ง€๋ฉ๋‹ˆ๋‹ค.
    pub fn enable_interrupt(&mut self, mask: bool) {
        let imsc = if mask { 0x01 } else { 0x00 };
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        unsafe { addr_of_mut!((*self.registers).imsc).write_volatile(imsc) }
    }

    /// ๋Œ€๊ธฐ ์ค‘์ธ ์ธํ„ฐ๋ŸฝํŠธ๊ฐ€ ์žˆ๋Š” ๊ฒฝ์šฐ ์ด๋ฅผ ์ง€์›๋‹ˆ๋‹ค.
    pub fn clear_interrupt(&mut self) {
        // self.registers๊ฐ€ ์ ์ ˆํ•˜๊ฒŒ ๋งคํ•‘๋œ PL031 ๊ธฐ๊ธฐ์˜ ์ œ์–ด ๋ ˆ์ง€์Šคํ„ฐ๋ฅผ
        // ๊ฐ€๋ฆฌํ‚ค๊ณ  ์žˆ์œผ๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
        unsafe { addr_of_mut!((*self.registers).icr).write_volatile(0x01) }
    }
}

// ๋ชจ๋“  ์ปจํ…์ŠคํŠธ์—์„œ ์•ก์„ธ์Šคํ•  ์ˆ˜ ์žˆ๋Š” ๊ธฐ๊ธฐ ๋ฉ”๋ชจ๋ฆฌ์— ๋Œ€ํ•œ
// ํฌ์ธํ„ฐ๋งŒ ํฌํ•จํ•˜๋ฏ€๋กœ ์•ˆ์ „ํ•ฉ๋‹ˆ๋‹ค.
unsafe impl Send for Rtc {}
}